1. Field of the Invention
The present invention relates to a level shift circuit in a semiconductor circuit configuration comprising a switching element and a signal output circuit comprised with this level shift circuit. More particularly, the present invention relates to a level shift circuit applicable to the outputting segment in the driver circuit formed as a peripheral circuit of an image display device or an image reader and a signal output circuit comprised with this level shift circuit.
2. Description of the Related Art
Conventionally, in the signal output circuit of the outputting segment in the driver circuit formed as a peripheral circuit of an image display device or an image reader, in order to generate driving signal voltage having a predetermined voltage amplitude for driving the drive transistors of the display pixels in an image display device, the photosensors of the reading pixels in an image reader, etc., a level shift circuit is used for transforming the input signal into a driving signal with different voltage amplitudes.
In such a driver circuit, since it corresponds to be formed as one body in the substrate of an Integrated Circuit (IC) chip type drive circuit of a display panel or a sensor panel, a circuit configuration constituted of Thin-Film Transistors (TFTs) can be applied. In such a case, the signal output circuit also includes a level shift circuit and a circuit configuration constituted of TFTs can be applied.
FIG. 5 is an equivalent circuit diagram showing an example configuration of a level shift circuit in the conventional prior art. A level shift circuit in the conventional prior art, for example as shown in FIG. 5, has a circuit configuration (In the drawing, a circuit that connects the input contact of the next stage CMOS inverter with the output contact of the first stage CMOS inverter.) connected in series with the input side of a Complementary Metal Oxide Semiconductor (CMOS) inverter serially connected to each other in the current path of a p-channel type TFT Tp101 and an n-channel type TFT Tn102 and the output side of the CMOS inverter serially connected to each other in the current path of a p-channel TFT Tp103 and an n-channel TFT Tn104 in between a high voltage Vdd supplied from a high potential power supply and a low voltage Vss supplied from a low potential power supply.
In such a level shift circuit, an input signal IN which has a predetermined voltage amplitude is supplied to the input terminal Tin connected in common to each gate terminal of the TFTs Tp101 and Tn102 configured on the input side of the CMOS inverter and an output signal OUT which has a voltage amplitude larger than the above-mentioned input signal IN is outputted from the output terminal Tout provided in the connection contact of the TFTs Tp103 and Tn104 configured on the output side of the CMOS inverter. Here, the voltage amplitude of the output signal OUT can be established randomly by setting appropriately each transistor size (channel size) of the TFTs Tp103 and Tn104 configured on the output side of the CMOS inverter in particular.
Moreover, as a general rule, for each TFT constituting a drive circuit comprised with a signal output circuit including such a level shift circuit, a TFT (hereinafter denoted as a “polysilicon TFT”) using a semiconductor layer consisting of polysilicon or a TFT (hereinafter denoted as an “amorphous silicon TFT”) using a semiconductor layer consisting of amorphous silicon can be applied.
However, the level shift circuit as shown in the conventional prior art has disadvantages as described in the following.
Namely, when applying the level shift circuit stated above to the signal output circuit of the outputting segment in the drive circuit of an image display device or an image reader, it is necessary to generate drive voltage (driving signal) which has a voltage amplitude relative to the specification of the display pixels (display panel) in the image display device or the reading pixels (sensor panel) in the image reader. For example, because the display pixels or reading pixels are driven depending on the image display device or the image reader, these apparatus need to generate and output a driving signal that has voltage amplitude of about 10V in the level shift circuit of the signal output circuit.
In cases where the configuration of the drive circuit includes a signal output circuit which uses polysilicon TFTs, as “ON” state current is relatively high and electron mobility (electron drift velocity) is relatively high, a signal output circuit having reasonably satisfactory operating speed can be acquired. However, because the withstand voltage of polysilicon TFTs is relatively low in the level shift circuit of the signal output circuit, the voltage amplitude (voltage surge) of 10V mentioned above cannot be tolerated and thereby polysilicon TFTs have a disadvantage in that eventually element breakdown will occur.
On the other hand, in cases where the configuration of the drive circuit includes a signal output circuit which uses amorphous silicon TFTs, since the withstand voltage of amorphous silicon TFTs is relatively high as compared with the case where polysilicon TFTs are used, the apparatus can control the development of element breakdown in relation to the voltage surge of 10V mentioned above in the level shift circuit of the signal output circuit. However, because “ON” state current is low and electron mobility is low as element resistance (channel resistance) is relatively high, amorphous silicon TFTs have a disadvantage in that the operating speed of the signal output circuit is slower.